Cisco Recruitment 2023 | For ASIC Design Verification Engineer

Cisco Recruitment Drive 2023

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Must be a recent graduate from a premier institute and working for a reputed product or semiconductor company

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Worked in the architecture of the test environments which include developing constrained random stimulus generators, automated response checkers, and advanced configuration and programming API components using UVM.
Problem solving skills and out-of-the-box thinking at reusing SV (UVM) classes for the verification and simulation environments.
Experience in writing thorough test plans as well as oral descriptions.
BSEE is required /MSEE is preferred.
Team-player, can-do attitude will work well in a group environment while still being able to contribute on an individual basis and you will find that you’ll have lots of fun and thrive in this environment if you enjoy being challenged, learning new ideas, and push yourself to achieve aggressive technology goals.
Good written/verbal interpersonal skills and leadership skills.
Work experience of BSEE+5/MSEE+3 years
Programming/scripting skills (C, C++, Perl)
Experienced in debugging aids/tools.
Verification tools/Languages/methodologies (VCS, System Verilog, UVM/OVM, Formal verification)
Experience in coding tests/small verification envs.
Must be a recent graduate from a premier institute and working for a reputed product or semiconductor company